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ltc6902 1 6902f n 2-, 3- or 4-phase outputs n optional spread spectrum frequency modulation for improved emc performance n 5khz to 20mhz frequency range n one external resistor sets the frequency n one external resistor sets percent frequency spreading n 400 m a typical supply current, v s = 3v, 1mhz n frequency error 1.5% max, 5khz to 10mhz (t a = 25 c) n frequency error 2% max, 5khz to 10mhz (t a = 0 c to 70 c) n 40ppm/ c temperature stability n fast start-up time: 50 m s to 1.5ms n 100 w cmos output driver n operates from a single 2.7v to 5.5v supply n available in 10-lead ms package multiphase oscillator with spread spectrum frequency modulation n switching power supply clock reference n portable and battery-powered equipment n pdas n cell phones n clocking switched capacitor filters the ltc ? 6902 is a precision, low power and easy-to-use oscillator that provides multiphase outputs in a small package. the oscillator frequency is set by a single exter- nal resistor (r set ). the ltc6902 also provides an optional spread spectrum frequency modulation (ssfm) capability that can be activated and controlled by an additional external resistor (r mod ). the ltc6902s master oscillator is controlled by the r set resistor and has a range of 100khz and 20mhz. in order to accommodate a wider output frequency range, a pro- grammable divider (divide by 1, 10 or 100) is included. the integrated programmable multiphase circuit pro- vides either 2-, 3- or 4-phase waveforms. the ltc6902s ssfm capability modulates the oscillators frequency by a pseudorandom noise (prn) signal to spread the oscillators energy over a wide frequency band. this spreading decreases the peak electromagnetic radia- tion level and improves electromagnetic compatibility (emc) performance. the amount of frequency spreading is programmable by a single additional external resistor (r mod ) and is disabled by grounding the mod pin. , ltc and lt are registered trademarks of linear technology corporation. v + div ph out1 out2 out4 out3 out2 out1 set mod gnd out4 out3 ltc6902 r set 10k r mod 10k 5v open 6902 ta01 0.1 f descriptio u features applicatio s u typical applicatio u 500khz, 4-phase clock with 20% frequency spreading frequency (khz) relative amplitude (dbm) ?0 ?0 0 6902 ta02 ?0 ?0 ?00 400 450 550 600 500 output spectrum with 20% spreading output spectrum with ssfm disabled output frequency spectrum with and without ssfm
ltc6902 2 6902f symbol parameter conditions min typ max units d f out frequency accuracy (notes 2, 3) v + = 5v 5khz f out 10mhz 0.5 1.5 % 1khz f out 5khz 2.0 % 10mhz f out 20mhz l 3.0 4.0 % 5khz f out 10mhz, ltc6902c l 2.0 % 5khz < f out 10mhz, ltc6902i l 2.5 % v + = 2.7v 5khz f out 10mhz 0.5 1.5 % 1khz f out 5khz 2.0 % 5khz f out 10mhz, ltc6902c l 2.0 % 5khz f out 10mhz, ltc6902i l 2.5 % r set frequency setting resistor range ? d f out ? < 1.5%, v + = 5v l 20 400 k w ? d f out ? < 1.5%, v + = 2.7v l 20 400 k w d f out / d t frequency drift over temperature r set = 63.2k l 0.004 %/ c (note 3) d f out / d v frequency drift over supply (note 3) v + = 2.7v to 5v, r set = 63.2k l 0.04 0.12 %/v timing jitter (note 4) 20k r set 400k pin 2 = v + (n = 100) 0.1 % pin 2 = open (n = 10) 0.2 % pin 2 = 0v (n = 1) 0.6 % long-term stability of 300 ppm/ ? khr output frequency duty cycle (note 5) pin 2 = v + or open (n = 100 or 10) pin 3 = 0v (2-phase, m = 1) l 49.0 50.0 51.0 % pin 3 = open (3-phase, m = 3) l 32.3 33.3 34.3 % pin 3 = v + (4-phase, m = 4) l 49.0 50.0 51.0 % pin 2 = 0v (n = 1) pin 3 = 0v (2-phase, m = 1) l 45.0 50.0 55.0 % pin 3 = open (3-phase, m = 3) l 32.3 33.3 34.3 % pin 3 = v + (4-phase, m = 4) l 49.0 50.0 51.0 % (note 1) supply voltage (v + ) to gnd ........................C 0.3v to 6v voltage on any pin (referred to gnd) ......................... C 0.3v to (v + + 0.3v) operating temperature range (note 9) ltc6902c .......................................... C 40 c to 85 c ltc6902i ............................................ C 40 c to 85 c specified temperature range (note 10) ltc6902c .......................................... C 40 c to 85 c ltc6902i ............................................ C 40 c to 85 c storage temperature range ................. C 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c absolute axi u rati gs w ww u package/order i for atio uu w consult ltc marketing for parts specified with wider operating temperature ranges. order part number ms part marking ltk2 ltk3 ltc6902cms ltc6902ims t jmax = 150 c, q ja = 250 c/w 1 2 3 4 5 v + div ph out1 out2 10 9 8 7 6 set mod gnd out4 out3 top view ms package 10-lead plastic msop the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v + = 2.7v to 5.5v, r l = 5k, c l = 5pf, pin 3 (ph) = 0v (2-phase, m = 1) unless otherwise specified. pin 9 (mod) is at 0v unless otherwise specified. r set is defined as a resistor connected from the set pin to the v + pin. r mod is defined as a resistor connected from the mod pin to the v + pin. electrical characteristics
ltc6902 3 6902f v + operating supply range l 2.7 5.5 v i s power supply current r set = 400k, r l = , pin 2 = v + (n = 100), f out = 5khz v + = 5v l 0.35 0.55 ma v + = 2.7v l 0.32 0.50 ma r set = 20k, r l = , pin 2 = 0v (n = 1), f out = 10mhz v + = 5v l 2.35 3.50 ma v + = 2.7v l 1.40 1.80 ma r set = 400k, r l = , pin 2 = v + (n = 100), r mod = 800k v + = 5v l 0.45 0.63 ma v + = 2.7v l 0.34 0.50 ma r set = 20k, r l = , pin 2 = 0v (n = 1), r mod = 40k v + = 5v l 2.50 3.60 ma v + = 2.7v l 1.40 1.90 ma v ih_div high level div input voltage l v + C 0.4 v v il_div low level div input voltage l 0.4 v i div div input current (note 6) pin 2 = v + , v + = 5v l 2 4 m a pin 2 = 0v, v + = 5v l C4 C2 m a v ih_ph high level ph input voltage l v + C 0.4 v v il_ph low level ph input voltage l 0.4 v i ph ph input currrent (note 6) pin 3 = v + , v + = 5v l 2 4 m a pin 3 = 0v, v + = 5v l C4 C2 m a v oh high level output voltage (note 6) v + = 5v i oh = C 1ma l 4.75 4.90 v (out1, out2, out3, out4) i oh = C 4ma l 4.40 4.70 v v + = 2.7v i oh = C 1ma l 2.35 2.6 v i oh = C 4ma l 1.85 2.2 v v ol low level output voltage (note 6) v + = 5v i ol = 1ma l 0.05 0.15 v (out1, out2, out3, out4) i ol = 4ma l 0.20 0.40 v v + = 2.7v i ol = 1ma l 0.1 0.3 v i ol = 4ma l 0.4 0.7 v t r output rise time (note 7) v + = 5v pin 2 = v + or open (n = 100 or n = 10) 14 ns (out1, out2, out3, out4) pin 2 = 0v (n = 1) 7 ns v + = 2.7v pin 2 = v + or open (n = 100 or n = 10) 19 ns pin 2 = 0v (n = 1) 11 ns t f output fall time (note 7) v + = 5v pin 2 = v + or open (n = 100 or n = 10) 13 ns (out1, out2, out3, out4) pin 2 = 0v (n = 1) 6 ns v + = 2.7v pin 2 = v + or open (n = 100 or n = 10) 19 ns pin 2 = 0v (n = 1) 10 ns spread spectrum frequency v + = 5v, n = 10, r set = 20k, r mod = 10k l 35 40 45.0 % modulation spreading percentage v + = 5v, n = 10, r set = 20k, r mod = 40k l 7.5 10 12.5 % (downspread from maximum v + = 2.7v, n = 10, r set = 20k, r mod = 10k l 35 40 45.0 % frequency) v + = 2.7v, n = 10, r set = 20k, r mod = 40k l 7.5 10 12.5 % percent = 100 ? (f max C f min )/f max (note 8) symbol parameter conditions min typ max units the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v + = 2.7v to 5.5v, r l = 5k, c l = 5pf, pin 3 (ph) = 0v (2-phase, m = 1) unless otherwise specified. pin 9 (mod) is at 0v unless otherwise specified. r set is defined as a resistor connected from the set pin to the v + pin. r mod is defined as a resistor connected from the mod pin to the v + pin. electrical characteristics
ltc6902 4 6902f electrical characteristics note 1: absolute maximum ratings are those values beyond which the life of the device may be impaired. note 2: frequencies near 100khz and 1mhz may be generated using two different values of r set (see applications information). for these frequencies, the error is specified under the following assumption: 20k < r set 400k for 5khz f out 10mhz. note 3: frequency accuracy is defined as the deviation from the f out equation. note 4: jitter is the ratio of the peak-to-peak distribution of the period to the mean of the period. this specification is based on characterization and is not 100% tested. note 5: guaranteed by 5v test. note 6: to conform with the logic ic standard convention, current out of a pin is arbitrarily given as a negative value. note 7: output rise and fall times are measured between the 10% and the 90% power supply levels with no output loading. these specifications are based on characterization. note 8: f max is defined as the highest frequency excursion and is equal to the f out frequency set by the r set resistor. f min is the lowest frequency excursion. note 9: the ltc6902cms and ltc6902ims are guaranteed functional over the operating temperature range of C40 c to 85 c. note 10: the ltc6902cms is guaranteed to meet 0 c to 70 c specifica- tions and are designed, characterized and expected to meet the specified performance from C40 c to 85 c but is not tested or qa sampled at these temperatures. the ltc6902ims is guaranteed to meet specified perfor- mance from C40 c to 85 c. output resistance vs supply voltage frequency variation vs r set frequency variation over temperature peak-to-peak jitter vs output frequency (m = 1, 2-phase mode) supply current vs output frequency [ssfm disabled, 2-phase mode (m = 1)] typical perfor a ce characteristics uw r set ( ) 1k variation (%) 4 3 2 1 0 ? ? ? ? 10k 100k 1m 6902 g01 typical low typical high t a = 25 c guaranteed limits apply over 20k r set 400k temperature ( c) ?0 variation (%) 1.00 0.75 0.50 0.25 0 0.25 0.50 0.75 1.00 6902 g02 ?0 0 20 40 60 80 typical low r set = 63.4k 1 or 10 or 100 typical high output frequency (hz) jitter (% p-p ) 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 6902 g03 1k 100k 1m 10k 10m 1, v a = 3v 1, v a = 5v 10 100 supply voltage (v) 2.5 3.0 40 output resistance ( ) 80 140 3.5 4.5 5.0 6902 g05 60 120 100 4.0 5.5 6.0 output sinking current output sourcing current t a = 25 c output frequency (hz) 1.0 supply current (ma) 2.0 3.0 3.5 1k 100k 1m 10m 6902 g04 0 10k 2.5 1.5 0.5 100, 5v 10, 5v 10, 3v 1, 3v 1, 5v 100, 3v
ltc6902 5 6902f output operating at 20mhz, v s = 5v 1v/div 12.5ns/div 69012 g06 1v/div 25ns/div 69012 g07 v + = 5v, r set = 10k, c l = 10pf v + = 3v, r set = 20k, c l = 10pf output operating at 10mhz, v s = 3v 0v 0v typical perfor a ce characteristics uw quick desig guide u step 1. select multiphase mode, setting m by selecting the multiphase mode, a division parameter m is also chosen: 2-phase: connect ph pin to gnd m = 1 3-phase: leave ph open m = 3 4-phase: connect ph pin to v+ m = 4 step 2. choosing programmable divider setting n a. for applications using spread spectrum frequency modulation (ssfm) or applications that are constant fre- quency where low clock jitter is the primary specification: divider setting frequency range (f out ? m) n = 1 connect div pin to gnd 2mhz to 20mhz n = 10 leave div open 200khz to 2mhz n = 100 connect div pin to v + < 200khz note: the frequency range numbers are for a 5v supply where a 20mhz output is the maximum frequency supported. for low supply applications (2.7v v + 4v), the maximum rated output frequency is 10mhz and all of the above numbers should be halved. b. for constant frequency applications where frequency accuracy is the primary specification: divider setting frequency range (f out ? m) n = 1 connect div pin to gnd > 500khz* n = 10 leave div open 50khz to 500khz n = 100 connect div pin to v + < 50khz *the maximum frequency (f out ? m) is 20mhz for 5v applications and is 10mhz for low supply applications (2.7v v + 4v). f mhz nm k r khz f mhz spreading percentage r r out set out set mod = w ? ? ? ? = 10 20 520 20 ; v + div ph out1 out2 out4 out3 out2 out1 set mod gnd out4 out3 ltc6902 r set r mod v + div ph 6902 f01 0.1 f figure 1. typical application with design equation
ltc6902 6 6902f quick desig guide u step 3. calculating the r set resistor value the r set resistor, the multiphase mode and the divider setting set the output frequency (f out ) for constant fre- quency applications. for ssfm applications, the maxi- mum frequency excursion (f max ) is equal to f out . rk mhz nmf n open v m h open hv set out =w ? ? ? ? = ? ? ? = = = = ? ? ? = = = + + 20 10 100 10 1 4 3 1 div pin v div pin div pin 0 (4 - phase output) ph pin v (3 - phase output) p pin (2 - phase output) p pin 0 step 4. calculating the r mod resistor value (note: for constant frequency applications r mod is not required. disable ssfm by connecting the mod pin to gnd) r r spreading percentage mod set = 20 where the spreading percentage is defined by the following: spreading percentage ff f max min max = 100 where f max is the highest frequency excursion (set by the r set value calculated in step 3) and f min is the lowest frequency excursion. example for a 4-phase, 250khz clock with 40% spreading: connect ph pin to v + ? selects 4-phase mode, m = 4 leave div pin open ? n = 10 r set = 20k ? sets f out = f max = 250khz r mod = 10k ? sets spreading to 40% uu u pi fu ctio s v + (pin 1): supply voltage ( 2.7v v + 5.5v). the supply should be kept free from noise and ripple. it should be bypassed directly to a ground plane with a 0.1 m f capacitor placed as close to the pin as possible. div (pin 2): divider setting input. this three-state input selects among three divider settings determining the value of n in the frequency equation. pin 2 should be tied to gnd for the ? 1 setting, the highest frequency range. floating pin 2, leaving it open, divides the master oscillator by 10. tie pin 2 to v + for the ? 100 setting, the lowest frequency range. to detect a floating div pin, the ltc6902 places the pin at the midsupply point with active circuitry. therefore, driving the div pin high requires sourcing approximately 2 m a. similarly, driving the div pin low requires sinking 2 m a. when the div pin is floated, it should be bypassed by a 1nf capacitor to gnd or it should be surrounded by a ground shield to prevent excessive coupling from other pcb traces. ph (pin 3): phase setting input. this three-state input selects among three multiphase options. this sets the outputs to produce 2-phase, 3-phase or 4-phase signals. it also sets the value of m in the frequency equation. pin 3 should be tied to gnd for the 2-phase setting. this is the highest frequency range with m set to 1. floating pin 3, leaving it open, selects the 3-phase setting. this also sets m to 3. tie pin 3 to v + for the 4-phase setting. this is the lowest frequency range as m is set to 4. to detect a floating ph pin, the ltc6902 places the pin at the midsupply point with active circuitry. therefore, driving the ph pin high requires sourcing approximately 2 m a. similarly, driving the ph pin low requires sinking 2 m a. when the ph pin is floated, it should be bypassed by a 1nf capacitor to gnd
ltc6902 7 6902f or it should be surrounded by a ground shield to prevent excessive coupling from other pcb traces. out1, out2, out3, out4 (pins 4, 5, 6 and 7): oscillator outputs. these pins can drive 5k w and/or 10pf loads. larger loads may cause inaccuracies due to supply bounce at high frequencies. gnd (pin 8): ground. should be tied to a ground plane for best performance. set (pin 10): frequency setting resistor input. the value of the resistor (r set ) connected between pin 10 and v + determines the oscillator frequency. the voltage on this pin is held at approximately 1.13v below the v + voltage. for best performance, use a precision metal film resistor with a value between 10k and 2m and limit the capacitance on this pin to less than 10pf. uu u pi fu ctio s mod (pin 9): spread spectrum frequency modulation setting resistor input. the value of the resistor (r mod ) connected between pin 9 and v + determines the amount of frequency modulation. the output frequency is always modulated down from the frequency set by the r set resis- tor. for best performance, use a precision metal film resis- tor with a value between 10k and 2m and limit the capacitance on this pin to less than 10pf. the voltage on this pin is not static. limiting the capacitance on this pin is important for the part to perform properly. to disable the modulation, connect this pin to gnd . grounding the mod pin disables the modulation and shuts down the modulation circuitry to save power. leaving the pin open to disable the modulation is not recommended . while leaving the pin open, r mod ? , gives the mathematical result of 0% modulation, the open pin is susceptible to external noise coupling that can effect frequency accuracy. block diagra w + + 1 10 9 i set i set mod 8 gnd current mirror i master i set g = 1 i mod i mod v bias v + ?v set = 1.1v 25% master oscillator programmable divider n (n = 1, 10 or 100) 3200 6902 bd 9-bit prbs generator v set ref multiplying dac 7 multiphase circuit selects between multiphase options and m 2-phase (m = 1) 3-phase (m = 3) 4-phase (m = 4) i mod set v + r set r mod + i master (v + ?v set ) f master = 10mhz ?20k 2 3 4 div ph out1 5 out2 6 out3 7 out4
ltc6902 8 6902f theory of operatio u as shown in the block diagram, the ltc6902s master oscillator is controlled by the ratio of the voltage between the v + and set pins (v + C v set ) and the current entering the master oscillator, i master . when the spread spectrum frequency modulation (ssfm) is disabled, i master is strictly determined by the v + C v set voltage and the i set current. when ssfm is enabled, the current i mod (modu- lation current) is subtracted from the i set current to determine the i master current value. here the i master current is maximally at i set but more often than not it is less than i set by a value determined by the i mod value. in this way the frequency of the master oscillator is modu- lated to produce a frequency that is always less than or equal to the frequency set by the i set current. the voltage on the set pin is forced to approximately 1.1v below v + by the pmos transistor and its gate bias voltage. this voltage is accurate to 8% at a particular input current and supply voltage (see figure 2). the r set resistor, connected between the v + and set pins, locks together the (v + C v set ) voltage and the current i set . this allows the parts to attain excellent frequency accuracy regardless of the precision of the set pin voltage. the ltc6902 is optimized for use with r set resistors between 10k and 2m. this corresponds to master oscillator fre- quencies between 100khz and 20mhz. additionally, the mod pins voltage tracks the set pins voltage. the r mod resistor connected between the v + and mod pins similarly locks together the mod pin voltage variation and the i mod current to once more yield excellent accuracy. the master oscillators output is connected to the pro- grammable divider. the output of the programmable divider is then connected to the multiphase circuit with its four outputs directly connected to output drivers. the final output frequency is determined by the r set resistor value, the programmable divider setting and the multiphase mode selected. the formula for setting the output fre- quency, f out , is below: f mhz nm k r out set = w ? ? ? ? 10 20 where: n open v m h open hv = ? ? ? = = = = ? ? ? = = = + + 100 10 1 4 3 1 div pin v div pin div pin 0 (4 - phase output) ph pin v (3 - phase output) p pin (2 - phase output) p pin 0 when the spread spectrum frequency modulation (ssfm) is disabled, the frequency f out is the final output fre- quency. when ssfm is enabled, f out is the maximum output frequency with the r mod resistor value determin- ing the minimum output frequency. the programmable divider divides the master oscillator signal by 1, 10 or 100. the divide-by value is determined by the state of the div input (pin 2). tie div to gnd or drive it below 0.5v to select ? 1. this is the highest frequency range, with the master output frequency passed directly to the multiphase circuit. the div pin may be floated or driven to midsupply to select ? 10, the intermediate fre- quency range. the lowest frequency range, ? 100, is se- lected by tying div to v + or driving it to within 0.4v of v + . figure 3 shows the relationship between r set , divider setting and output frequency, including the overlapping frequency ranges near 100khz and 1mhz. the multiphase circuit generates outputs that are either 2-, 3- or 4-phase waveforms. to generate the 3- and 4-phase output signals, the output from the programmable figure 2. v + C v set variation with i res i res ( a) 1 0.1 0.8 v res = v + ?v set 1.2 1.3 1.4 10 100 1000 69012 f02 1.1 1.0 0.9 v + = 5v v + = 3v
ltc6902 9 6902f divider goes through further division. in addition to fur- ther division, the duty cycle of the output depends on the multiphase mode selected. figure 4 shows the waveform at each output for 2-, 3- and 4-phase modes. 2-phase mode in 2-phase mode, all outputs are nominally 50% duty cycle. out1 and out2 are 180 degrees out of phase. stated differently, out2 is out1 inverted. however, out2 theory of operatio u is not simply out1 routed through a standard logic inverter. this would lead to substantial delay for out2s transitions from out1s transitions. out1 and out2 are created by a delay matched inverting circuit. apart from the basic inversion, the delay matching is determined by analog circuit parameters. with this type of design, out1 and out2 transitions are typically within 100ps. out3 and out4 are replications of out1 and out2 respectively. since the two phases are generated via delay matched inverters, there is not any further division and the param- eter m in the frequency setting equation is 1 (m = 1). 3-phase mode in 3-phase mode, out1, out2 and out3 are active and all three outputs have a 33.3% duty cycle. out4 is not active and is at a logic low state. the three active outputs are all 120 degrees out of phase. out2 lags out1 by 120 degrees and out3 lags out2 by 120 degrees. the signals are generated by a shift register. the output frequency is the programmable dividers output further divided 3 (m = 3). 4-phase mode in 4-phase mode, all outputs have a 50% duty cycle. the outputs are all 90 degrees out of phase. out2 lags out1 figure 3. r set vs desired output frequency (ph = gnd, 2-phase, m = 1) out1 2-phase, ph = gnd out2 out3 out4 out1 3-phase, ph = open out2 out3 out4 out1 4-phase, ph = v + out2 out3 out4 m = 1 duty cycle = 50% m = 3 duty cycle = 33% (out4 = logic low) m = 4 duty cycle = 50% 69012 f04 figure 4. mulitphase output waveforms desired output frequency (hz) 10 r set (k ) 100 1k 100k 1m 10m 69012 f03 1 10k 10000 1000 100m 100 10 1
ltc6902 10 6902f theory of operatio u by 90 degrees, out3 lags out2 by 90 degrees and out4 lags out3 by 90 degrees. the signals are generated by flip-flops. the output frequency is the programmable dividers output further divided 4 (m = 4). the multiphase mode is determined by the state of the ph input (pin 3). tie the ph pin to gnd or drive it below 0.5v to select the 2-phase mode. the ph pin may be floated or driven to midsupply to select the 3-phase mode. the 4-phase mode is selected by tying the ph pin to v + or driving it to within 0.4v of v + . the cmos output drivers have an on resistance that is typically less than 100 w . in the ? 1 (high frequency) mode, the rise and fall times are typically 7ns with a 5v supply and 11ns with a 3v supply. these transition times maintain a clean square wave at 10mhz (20mhz at 5v supply). in the ? 10 and ? 100 modes, where the output frequency is much lower, slew rate control circuitry in the output driver in- creases the rise/fall times to typically 14ns for a 5v supply and 19ns for a 3v supply. the reduced slew rate lowers emi (electromagnetic interference) and supply bounce. spread spectrum frequency modulation the ltc6902 provides the additional feature of spread spectrum frequency modulation (ssfm). the oscillators frequency is modulated by a pseudorandom noise (prn) signal to spread the oscillators energy over a wide fre- quency band. this spreading decreases the peak electro- magnetic radiation levels and improves electromagnetic compatibility (emc) performance. the amount of frequency spreading is determined by the external resistor r mod and the voltage between the v + and mod pins (v + C v mod ). unlike the stationary set pin voltage (v set ), the mod pin voltage (v mod ) is a dynamic signal generated by a multiplying digital to analog con- verter (mdac) referenced to v set . referencing to v set negates errors due to variations of the v set voltage and locks the two voltages together. the v mod voltage is the v set voltage scaled by one fifth and multiplied by the digital code sent to the mdac from the pseudorandom binary sequence (prbs) generator. v mod varies in a pseudorandom noise-like manner. the (v + C v mod ) volt- age is 0v minimum and maximally one fifth (20%) of (v + C v set ). referencing v mod to v set allows the ratio of r set to r mod to determine the amount of frequency spreading. consider the case when r set is equal to r mod . here, when the (v + C v mod ) voltage is at its minimum of 0v, i mod = 0a, i master = i set and the master oscillator is at its maximum frequency (f max ) which is the f out fre- quency set by the r set resistor. furthermore, when the (v + C v mod ) voltage is at its maximum of 20% of (v + C v set ), i mod = 0.2 ? i set , i master = 0.8 ? i set and the master oscillator is at its minimum frequency (f min ) which is 80% of the f osc frequency set by the r set resistor. the general formula for the amount of frequency spreading is below: frequency spreading (in %) = 20 r set r mod where frequency spreading is defined as: frequency spreading (in %) = 100 f f max max f min the design procedure is to first choose the r set resistor value to set f max (f out ) and then choose the r mod resistor value to set the amount of frequency spreading desired. note that the frequency is always modulated to a lower value. this is often referred to as a down spread signal. to disable the ssfm, connect the mod pin to ground. grounding the mod pin disables the modulation and shuts down the modulation circuitry. while leaving the mod pin open, r mod = , gives a frequency spreading of 0%, this is not a good method of disabling the modulation. the open pin is susceptible to external noise coupling that can affect the output frequency accuracy. grounding the mod pin is the best way to disable the ssfm. as stated previously the modulating waveform is a pseu- dorandom noise-like waveform. the pseudorandom signal is generated by a linear feedback shift register that is 9 bits long. the pseudorandom sequence will repeat every 512 (2 9 ) shift register clock cycles. the bottom seven bits of the shift register are sent in parallel to the mdac which pro- duces the v mod voltage. being a digitally generated signal, the output is not a perfectly smooth waveform but consists of 128 (2 7 ) discrete steps that change every shift register
ltc6902 11 6902f theory of operatio u f max f min 128 steps time 69012 f05 3200 f master frequency t step t step = t repeat 3200 ?512 f master t repeat = figure 5 applicatio s i for atio wu uu selecting the divider setting and r set value the ltc6902s master oscillator has a frequency range spanning 0.1mhz to 20mhz. however, accuracy may suffer if the master oscillator is operated at greater than 10mhz with a supply voltage lower than 4v. a program- mable divider extends the frequency range to greater than three decades. additional frequency division may occur depending on the multiphase mode selected. the multiphase mode and the parameter m are generally dependent on the applications requirement and usually do not offer any additional design flexibility. the ltc6902s master oscillator covers a 200:1 range while the programmable divider has 10:1 steps (1, 10, 100). this wide frequency range coupled with the parts programmable divider yields at least two solutions for any desired output frequency (the exception being the highest output frequencies that cannot be divided down). choos- ing the best divider setting and the correct r set resistor value depends on the application. for spread spectrum frequency modulated (ssfm) appli- cations, choose the highest divider setting. this forces the master oscillator to run at its highest frequency. the pseudorandom signal generator is clocked by the master oscillator, not the output, and the faster the signal moves the greater the improvement in emc performance. for most applications the multiphase mode is determined by the specific applications need. for these applications, the parameter m is predetermined and fixed. table 1 lists the recommended output (f out ) frequency range for each divider setting when using ssfm. clock cycle. note that the shift register clock is the master oscillators output divided by 3200. this results in a some- what slow moving modulating signal where each step is separated in time by 3200/f master seconds and the pseu- dorandom sequence repeats every (512 ? 3200)/f master seconds. the servo loop in the ltc6902 cannot respond instanta- neously to each step due to its limited bandwidth. the v mod voltage steps are converted to frequency steps by the servo loop. the servo loop has a bandwidth of about 25khz that limits the frequency change rate and softens corners of the waveform. this is beneficial when the ltc6902 is used to clock switching regulators as will be discussed in the applications information section. fig- ure 5 illustrates the how the output frequency varies over time.
ltc6902 12 6902f table 1. recommended frequency range vs programmable divider setting for ssfm applications or for low jitter constant frequency applications divider setting frequency range (f out ? m) n = 1 div (pin 2) = gnd 2mhz to 20mhz n = 10 div (pin 2) = open 200khz to 2mhz n = 100 div (pin 2) = v + < 200khz note: the frequency range numbers are for a 5v supply where a 20mhz output is the maximum frequency supported. for low supply applications (2.7v v + 4v), the maximum rated output frequency is 10mhz and all of the above numbers should be halved. for constant frequency applications, where ssfm is dis- abled, the best operating position depends on which parameter is most important in the application. for the lowest clock jitter it is best to set the divider to its highest setting as done above. the divider reduces the master oscillators jitter. the higher the division number the greater the reduction in the master oscillators jitter. for the best frequency accuracy it is best to run the program- mable divider at its lowest setting, and thus, the master oscillator runs at a lower frequency. the lower master oscillator frequencies are more accurate and use less power. to determine a tradeoff between frequency accu- racy and jitter consult the typical performance character- istics curves. table 2 lists the recommended output fre- quency range for each divider setting for continuous frequency applications where frequency accuracy is the primary specification. table 2. recommended frequency range vs programmable divider setting for best frequency accuracy, constant frequency applications (ssfm disabled) divider setting frequency range (f out ? m) n = 1 div (pin 2) = gnd > 500khz* n = 10 div (pin 2) = open 50khz to 500khz n = 100 div (pin 2) = v + < 50khz *the maximum frequency (f out ? m) is 20mhz for 5v applications and is 10mhz for low supply applications (2.7v v + 4v). for some applications, the multiphase circuit is also useful in forcing the master oscillator to run at a higher or lower frequency. if the application requires a single clock source, the multiphase circuit can be set in whatever mode gives the highest or lowest divider number (m) and thus the highest or lowest master oscillator frequency. addition- ally, if the application requires just two phases, the 4-phase applicatio s i for atio wu uu mode can be selected with only the out1 and out3 outputs are used (or alternatively the out2 and out4 outputs). for instance, a 500khz, 2-phase clock can be obtained in four different ways. table 3 lists the possible solutions. for an ssfm application, the preferred solution for best emc performance is the last alternative where the master oscillator is at 20mhz. for a constant frequency applica- tion, the preferred solution is the first alternative with the master oscillator at 500khz. table 3. four possible ways to obtain a 500khz, 2-phase clock r set n multiphase mode m f master outputs 400k 1 2 1 500khz out1, out2 100k 1 4 4 2mhz out1, out3 40k 10 2 1 5mhz out1, out2 10k 10 4 4 20mhz out1, out3 after choosing the proper divider setting, determine the correct frequency-setting resistor. because of the linear correspondence between oscillation period and resis- tance, a simple equation relates resistance with frequency. rk mhz mnf set out = ? ? ? ? ? ? ? ? ? ? 20 10 100 10 1 4 3 1 , n = m = (r setmin = 10k, r setmax = 2m) any resistor, r set , tolerance adds to the inaccuracy of the oscillator, f out . setting the spread spectrum modulation spreading percentage with the ltc6902 setting the spread spectrum modulation percentage on the ltc6902 is very simple and straightforward. since the spreading is ratiometric, in percentage, the program- mable divider and multiphase mode selection have no influence on the spreading percentage. in general, for greatest emc improvement, each application should apply as much spreading as possible. the amount of spreading that any particular application can tolerate is dependent on the specific nature of that application. once the r set resistor value is calculated to set f max and the desired
ltc6902 13 6902f applicatio s i for atio wu uu spreading is determined, the r mod value is calculated using the simple equation below: r r spreading percentage mod set = 20 the only limitations for this formula are in the r mod value range and the spreading percentage range. the range of the r mod resistor value is the same as that for r set ranging from 10k to 400k. the ltc6902 is tested and specified for spreading of 10% and 40%. these are practical limits that would apply to many systems but they are not the actual limits of the part. the lower end limit is set by internal offsets and mismatches. at lower spreading percentages, these mismatches become more significant and the error from the calculated, desired spreading increases. a practical lower end limit would be about 5% spreading. at the higher end internal mismatching be- comes less significant, however other factors come into play and a theoretical limit approaching 100% (f min ap- proaching zero) cannot be reliably achieved. a practical upper limit would be about 80% spreading. to disable the ssfm, connect the mod pin to ground. grounding the mod pin disables the modulation and shuts down the modulation circuitry. while leaving the mod pin open, r mod = , gives a frequency spreading of 0%, this is not a good method of disabling the modulation. the open pin is susceptible to external noise coupling that can affect the output frequency accuracy. grounding the mod pin is the best way to disable the ssfm. driving logic circuits the outputs of the ltc6902 are suitable for driving general digital logic circuits. the cmos output drivers have an on resistance that is typically less than 100 w and are very similar in performance to hcmos logic outputs. however, the form of frequency spreading used in the ltc6902 may not be suitable for many logic designs. many logic designs have fairly tight timing and cycle-to- cycle jitter requirements. these systems often benefit from a spread spectrum clocking system where the fre- quency is slowly and linearly modulated by a triangular waveform, not a pseudorandom waveform. this type of frequency spreading maintains a minimal difference in the timing from one clock edge to the next adjacent clock edge (cycle-to-cycle jitter). the ltc6902 uses a pseudorandom modulating signal where the frequency transitions have been slowed and the corners rounded by a 25khz lowpass filter. this filtered modulating signal may be acceptable for many logic systems but the cycle-to-cycle jitter issues must be considered carefully. driving switching regulators the ltc6902 is designed primarily to provide an accurate and stable clock for switching regulator systems, espe- cially those systems with multiple switching regulators where all of the regulators are interleaved and are run at the same frequency. this lowers the input capacitor require- ments and prevents beat notes formed by mixing numer- ous clock frequencies and their harmonics. the multiphase outputs have cmos drivers with an on resistance that is typically less than 100 w and are very similar in perfor- mance to hcmos logic outputs. this is suitable for directly driving most switching regulators and switching controllers. linear technology has a broad line of fully integrated switching regulators and switching regulator controllers designed for synchronization to an external clock. all of these parts have one pin assigned for external clock input. the nomenclature varies depending on the parts family history. sync, pllin, sync/mode, shdn, extclk, fcb and s/s (shorthand for sync/shdn) are examples of clock input pin names used with linear technology ics. the exact operating details depend on the switching regulator in use, but generally switching is synchronized to the rising edge of the clock. since the ltc6902s master oscillator is passed through inverters or flip-flops to generate its multiphase outputs, coincident rising edges (or falling edges) cannot occur. this is true even when the ltc6902 is used with a high percentage of spreading. for the best emc performance, the ltc6902 should be run with ssfm enabled and the master oscillator at its highest frequency. the pseudorandom modulation signal
ltc6902 14 6902f applicatio s i for atio wu uu generator is driven by the master oscillator frequency, not the output frequency. this gives some design flexibility in the choice of the r set and the programmable divider setting. when making the choice, usually the faster mas- ter oscillator is the better choice. this is especially true when the main goal is to lower peak radiated or conducted signal levels measured during regulatory agency testing. regulatory testing is done with strictly specified band- widths and conditions. modulating faster than the test bandwidth or as close to the bandwidth as possible gives the lowest readings. the optimal modulating rate is not as straightforward when the goal is to lower radiated signal levels interfering with other circuitry in the system. the modulation rate will have to be evaluated with the specific system conditions to determine the optimal rate. depend- ing on the specific frequency synchronization method a switching regulator employs, the modulation rate must be within the synchronization capability of the regulator. many switching regulators use a phase-locked loop (pll) for synchronization. for these parts, the pll loop filter should be designed to have sufficient capture range and bandwidth. even when running the ltc6902 at the maximum modu- lation rate, the frequency hopping transitions are slowed by the parts servo loop. the frequency transitions are slowed by a 25khz lowpass. this is an important feature when driving a switching regulator. the switching regula- tor is itself a servo loop with a bandwidth typically on the order of 1/10, but can vary from 1/50 to 1/2 of the operating frequency. when the input clock frequencys transition is within the bandwidth of the switching regula- tor, the regulators output stays in regulation. if the tran- sition is too sharp, beyond the bandwidth of the switching regulator, the regulators output will experience a sharp jump and then settle back into regulation. if the bandwidth of the switching regulator is sufficiently high, beyond 25khz, then there will not be any regulation issues. one aspect of the output voltage that will change is the output ripple voltage. every switching regulator has some output ripple at the clock frequency. for most switching regulator designs with fixed mosfets, fixed inductor, fixed capacitors, the amount of ripple will vary some with the regulators operating frequency (the main exception being hysteresis architecture regulators). an increase in frequency results in lower ripple and a frequency decrease gives more ripple. this is true for static frequencies or dynamic frequency modulated systems. if the modulating signal was a triangle wave, the regulators output would have a ripple that is amplitude modulated by the triangle wave. this repetitive signal on the power supply could cause system problems by mixing with other desired signals and giving a distorted output. depending on the inductor design and triangle wave frequency, it may even result in an audible noise. the ltc6902 uses a pseudoran- dom noise-like modulating signal. this results in the regulators output ripple being modulated by the wideband pseudorandom noise-like signal. on an oscilloscope, it looks essentially noise-like of even amplitude. the signal is broadband and any mixing issues are minimized. addi- tionally, the pseudorandom signal repeats at such a low rate that it is well below the audible range. the ltc6902 directly drives many switching regulators. the ltc6902 with the spread spectrum frequency modu- lation results in improved emc performance. if the band- width of the switching regulator is sufficient, not a difficult requirement in most cases, the regulators regulation, efficiency and load response are maintained while peak electromagnetic radiation (or conduction) is reduced. output ripple may be somewhat increased, but its behav- ior is very much like noise and its system impact is benign.
ltc6902 15 6902f figure 7. start-up time time after power applied ( s) 0 frequency error (%) 20 30 40 600 400k 1000 69012 f07 10 0 ?0 200 400 800 50 60 70 63.2k 20k t a = 25 c v + = 5v power supply sensitivity figure 6 shows the output frequency sensitivity to power supply voltage at several different temperatures. the ltc6902 has a guaranteed voltage coefficient of 0.1%/v but, as figure 6 shows, the typical supply sensitivity is twice as low. start-up time the start-up time and settling time to within 1% of the final value can be estimated by t start @ r set (3.7 m s/k w ) + 10 m s. note the start-up time depends on r set and is independent from the setting of the divider pin. for in- stance with r set = 100k, the ltc6902 will settle with 1% of its 200khz final value (n = 10) in approximately 380 m s. figure 7 shows start-up times for various r set resistors. jitter the peak-to-peak jitter vs output frequency graph, in the typical performance characteristics section, shows the typical clock jitter as a function of oscillator frequency and power supply voltage. the capacitance from the set pin, (pin 3), to ground must be less than 10pf. if this require- ment is not met, the jitter will increase. applicatio s i for atio wu uu information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. figure 6. supply sensitivity supply voltage (v) 2.5 0.05 frequency deviation (%) 0 0.05 0.10 0.15 3.0 3.5 4.0 4.5 69012 f06 5.0 5.5 85 c ?0 c 25 c r set = 63.2k pin 4 = floating ( 10)
ltc6902 16 6902f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear.com ? linear technology corporation 2003 lt/tp 0103 2k ? printed in usa related parts part number description comments ltc1799 1khz to 30mhz thinsot tm oscillator single output, higher frequency operation ltc6900 1khz to 20mhz thinsot oscillator single output, lower power thinsot is a trademark of linear technology corporation. u package descriptio ms package 10-lead plastic msop (reference ltc dwg # 05-08-1661) msop (ms) 0802 0.53 0.01 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 0.27 (.007 ?.011) typ 0.13 0.076 (.005 .003) 0.86 (.034) ref 0.50 (.0197) bsc 12 3 45 4.90 0.15 (1.93 .006) 0.497 0.076 (.0196 .003) ref 8 9 10 7 6 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) note 4 note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.254 (.010) 0 ?6 typ detail ? detail ? gauge plane 5.23 (.206) min 3.2 ?3.45 (.126 ?.136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc
timing home > products > special functions > timing > silicon oscillators > ltc6902 silicon oscillators site help site map site index send us feedback ? 2007 linear technology | terms of use | privacy policy search ltc6902 - multiphase oscillator with spread spectrum frequency modulation features click here for ltc6902 evaluation kit 2-, 3- or 4-phase outputs optional spread spectrum frequen cy modulation fo r improved emc performance 5khz to 20mhz frequency range one external resistor sets the frequency one external resistor sets percent frequency spreading 400a typical supply current, v s = 3v, 1mhz frequency error <=1.5% max, 5khz to 10mhz (ta = 25c) frequency error <= 2% max, 5khz to 10mhz (ta = 0c to 70c) 40ppm/c temperature stability fast start-up time: 50s to 1.5ms 100 ohm cmos output driver operates from a single 2.7v to 5.5v supply available in 10-lead ms package typical application order now request samples documentation datasheet ltc6902 - multiph a with spread spectr u frequency modulat i application note an93 instrumentati o applications for a m oscillator: a clock f reasons design note dn411 - simple an d output point - of - lo a module system lt magazine feb 2004 easy - to - u spectrum clock ge reduces emi and m reliability data r426 reliability da t reference design dc655a - lt3430ife/ltc69 0 evaluation kit pa g e 1 of 3 linear technolo gy - ltc6902 - multi p hase oscillator with s p read s p ectrum fre q uenc y ... 28-feb-2008 htt p ://www.linear.com/ p c/ p roductdetail. j s p ?navid=h0,c1,c1010,c1784,c1096,p2293
description the ltc6902 is a precision, low power and easy-to-use oscillator that provides multiphase outputs in a small package. the oscillator frequency is set by a single external resistor (r set ). the ltc6902 also provides an optional spread spectrum frequency modulation (ssfm) capability that can be activated and controlled by an additional external resistor (r mod ). the ltc6902?s master oscillator is controlled by the rset resistor and has a range of 100khz and 20mhz. in order to accommodate a wider output frequency range, a programmable di vider (divide by 1, 10 or 100) is included. the integrated programmable mu ltiphase circuit provides either 2- , 3- or 4-phase waveforms. the ltc6902?s ssfm capability modulates the oscillator?s frequency by a pseudorandom noise (prn) signal to spread the oscillator?s energy over a wide frequency band. this spreading decreases the peak electromagnetic radiation level and improves elec tromagnetic compatibility (emc) performance. the amount of frequency spreading is programmable by a single additional external resistor (r mod ) and is disabled by grounding the mod pin. packaging msop-10 order info part numbers ending in pbf are lead free . please contact ltc marketing for information on lead based finish parts. part numbers containing tr or trm are shipped in tape and reel or 500 unit mini tape and reel , respectively please refer to our general ordering information or the product datasheet for more details package variations and pricing back to top back to top back to top part number package pins temp price (1-99) price (1k) * rohs data ltc6902cms msop 10 c $2.90 $2.20 view pa g e 2 of 3 linear technolo gy - ltc6902 - multi p hase oscillator with s p read s p ectrum fre q uenc y ... 28-feb-2008 htt p ://www.linear.com/ p c/ p roductdetail. j s p ?navid=h0,c1,c1010,c1784,c1096,p2293
* the usa list pricing shown is for budgetary use only, shown in united states dollars (fob usa per unit for the stated volume), and is subject to change. international prices may differ due to local duties, taxes, fees and exchange rates. for volume-specific price or delivery quotes, please contact your local linear technology sales office or authorized distributor . evaluation kits applications switching power supply clock reference portable and battery-powered equipment pdas cell phones clocking switched c apacitor filters simulate to simulate selected linear technology products, please download ltspice / switchercad iii . this powerful schematic capture and simulation tool includes macro models for 80% of linear technology's switching regulators, over 200 op amp models, as well as resistors, transistors and mosfet models. for other simulation tools, visit our design simulation and device models page. ltc6902cms#pbf msop 10 c $2.90 $2.20 view ltc6902cms#tr msop 10 c $2.25 view ltc6902cms#trpbf msop 10 c $2.25 view ltc6902ims msop 10 i $3.63 $2.75 view ltc6902ims#pbf msop 10 i $3.63 $2.75 view ltc6902ims#tr msop 10 i $2.80 view ltc6902ims#trpbf msop 10 i $2.80 view buy now request samples part number description price dc655a lt3430ife ltc6902ims | 4a high voltage buck dc/dc converter, vin = 8v - 42v, vout = 5v @ 4a $195.00 buy now back to top back to top back to top pa g e 3 of 3 linear technolo gy - ltc6902 - multi p hase oscillator with s p read s p ectrum fre q uenc y ... 28-feb-2008 htt p ://www.linear.com/ p c/ p roductdetail. j s p ?navid=h0,c1,c1010,c1784,c1096,p2293

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